SOC has a direct, measurable effect on both pulse impedance and burst power. For the lithium-manganese spinel/lithium-titanate cell described, 10-second pulse impedance rises from approximately 0.0342 Ω at 100% SOC to 0.0562 Ω at 5% SOC and 0.0652 Ω at 0% SOC. At a high discharge current of 560 A, this increased resistance is associated with a decline in 10-second pulse power from approximately 108.5 kW to 87.0 kW.
As SOC falls—especially below roughly 30%—the cell experiences greater voltage drop under load and cannot sustain the same high-current discharge. Accurate SOC-dependent pulse testing is therefore essential for determining safe power limits, validating battery-management controls, and optimizing high-power cell designs.
How SOC Changes Pulse Impedance
Resistance rises as the cell approaches empty
During a 10-second discharge pulse, the cell’s internal impedance is relatively low at high SOC and increases as SOC declines.
For the referenced cell, impedance increases by approximately 64% between 100% SOC and 0% SOC:
- 100% SOC: approximately 0.0342 Ω
- 5% SOC: approximately 0.0562 Ω
- 0% SOC: approximately 0.0652 Ω
This means that the same discharge current produces a larger internal voltage drop when the battery is nearly empty.
The voltage response reveals usable power
A pulse test measures the transient terminal-voltage change caused by a known current. The effective pulse resistance can be estimated as:
[ R_{\mathrm{pulse}} = \frac{\Delta V}{|I|} ]
where ΔV is the change in terminal voltage during the pulse and I is the applied current.
As SOC decreases, the measured voltage response becomes larger for the same current. The battery therefore reaches its minimum allowable discharge voltage sooner, limiting the current and power that can be safely delivered.
The middle SOC range is generally more stable
Pulse impedance is often comparatively stable through the middle SOC range, approximately 30%–70% SOC, before increasing near the low-SOC and high-SOC extremes.
This stability does not mean power is constant. Terminal voltage, temperature, pulse duration, and the voltage limits imposed by the test all continue to influence the measured result.
Why Burst Power Falls at Low SOC
Lower SOC reduces available discharge capability
At low SOC, the amount of lithium available to support rapid discharge is reduced. Under a high-current pulse, the cell is more likely to experience a severe voltage drop and reach its lower voltage limit.
This is why low-SOC operation can restrict burst power even when the cell’s nominal capacity and voltage rating appear suitable for the application.
Resistance directly increases voltage sag
The resistive component of the voltage drop follows:
[ \Delta V = I R ]
At 560 A, even a relatively small increase in resistance creates a substantial additional voltage drop. The increase from 0.0342 Ω to 0.0652 Ω therefore materially reduces the voltage available to the external load during the 10-second pulse.
Power capability is non-linear with SOC
Discharge power does not increase or decrease in a perfectly linear relationship with SOC. It reflects the combined effects of:
- Internal impedance
- Available terminal voltage
- Electrode lithium-ion availability
- Temperature
- Pulse duration
- Permitted voltage limits
As a result, the most useful engineering output is not a single rated power value, but a power-versus-SOC map.
Why This Matters for Laboratory Battery Testing Systems
Testing systems must control SOC precisely
SOC-dependent pulse data is only meaningful when the starting SOC is accurately established. Laboratory systems must precisely control discharged or charged capacity and account for factors such as high-rate operation and temperature-dependent capacity variation.
An inaccurate SOC reference can make a healthy cell appear to have abnormal resistance or can hide the loss of power capability near the ends of the operating window.
Pulse-current accuracy affects the resistance result
Because pulse impedance is calculated from current and voltage changes, errors in either measurement directly affect the result. A laboratory battery tester must accurately generate the programmed pulse and capture the transient voltage response with suitable timing and resolution.
This is particularly important at high currents, where small measurement or control errors can produce significant errors in calculated power capability.
Systems must enforce voltage and current limits
Pulse-power testing intentionally drives the cell toward demanding operating conditions. The test system must therefore enforce:
- Maximum discharge and charge currents
- Upper and lower cell-voltage limits
- Temperature limits
- Pulse duration
- Rest periods
- SOC test boundaries
These safeguards make the characterization repeatable while preventing the test itself from damaging the cell.
Temperature must be measured and controlled
Temperature changes internal impedance. Higher temperatures can temporarily reduce resistance and allow greater pulse power, while colder conditions generally increase resistance and restrict output.
Without temperature control or accurate temperature logging, a measured SOC effect may be confused with a thermal effect.
The data supports battery-management algorithms
A battery-management system needs more than nominal capacity information. It must know how much power the battery can deliver at a particular SOC, temperature, voltage, and current condition.
SOC-dependent pulse measurements provide the basis for dynamic limits such as:
- Maximum allowable discharge power
- Maximum regenerative-charge power
- Current derating near low SOC
- Protection thresholds
- Available-power estimates shown to the vehicle or system controller
What the Measurements Reveal About Cell Design
Pulse resistance helps compare formulations
For battery R&D engineers, measuring pulse impedance across SOC provides a practical way to compare cell formulations, electrode designs, and manufacturing variations.
A formulation that maintains lower impedance over a wider SOC range may be better suited to applications requiring repeated high-power bursts.
The test identifies the usable high-power window
The highest nominal SOC does not automatically define the best operating point for every application. Researchers can plot discharge and charge pulse power across SOC to identify the practical operating window and the points where capability begins to collapse.
This helps distinguish installed energy capacity from usable high-power capacity.
Repeated pulses reveal more than one pulse
A single 10-second pulse characterizes one operating condition. Repeated pulse sequences can reveal whether resistance increases due to heating, polarization, incomplete recovery, or progressive SOC change.
The test protocol should therefore match the intended application, particularly when the battery will experience repeated acceleration, regenerative braking, or load bursts.
Understanding the Trade-offs
High SOC improves discharge power but can restrict charging power
Discharge power is generally strongest at high SOC because the cell has higher voltage and lower discharge impedance. Charging power can behave differently: as SOC rises, the cell approaches its upper voltage limit more quickly during a charge pulse.
Therefore, a battery may have high discharge capability at high SOC while simultaneously requiring stricter charge-power limits.
Low impedance does not equal unlimited power
Even a low measured impedance does not justify unrestricted current. Voltage limits, temperature rise, lithium-ion transport, aging, and pulse duration can all constrain safe operation.
Pulse impedance is an important diagnostic quantity, but it must be interpreted together with the complete voltage, temperature, and SOC test record.
One test condition cannot represent all operating conditions
A 10-second pulse at 560 A provides valuable information, but it does not predict performance under every load profile. Different pulse lengths and temperatures can produce different apparent resistances and power limits.
Laboratory characterization should use a defined and repeatable protocol rather than treating one pulse result as a universal cell rating.
End-of-SOC behavior requires careful interpretation
Impedance increases near low SOC, and the cell may approach its lower voltage limit rapidly. Measurements in this region are especially sensitive to rest time, current accuracy, temperature, and the chosen SOC definition.
Poorly controlled testing can exaggerate or obscure the true low-SOC power limitation.
Making the Right Choice for Your Goal
Use SOC-dependent pulse characterization as a design input, not merely as a pass/fail measurement.
- If your primary focus is high-power cell development: Compare 10-second pulse impedance and voltage sag across the full SOC range to identify formulations that preserve burst capability at low SOC.
- If your primary focus is battery-management-system design: Convert the measured pulse results into discharge- and charge-power limits indexed by SOC, temperature, voltage, and pulse duration.
- If your primary focus is laboratory test accuracy: Use a precision testing system with controlled SOC, calibrated current and voltage measurement, temperature monitoring, and repeatable pulse timing.
- If your primary focus is safe operating limits: Define allowable current and power from the measured voltage response rather than relying only on nominal capacity or nameplate power.
- If your primary focus is product validation: Reproduce application-relevant pulse sequences across multiple SOC and temperature conditions to verify that the cell meets its real operating requirements.
Reliable SOC-dependent pulse data turns battery testing from a nominal rating exercise into a defensible assessment of real-world power capability.
Summary Table:
| SOC (%) | 10s Pulse Impedance (Ω) | 10s Burst Power at 560A (kW) |
|---|---|---|
| 100 | 0.0342 | 108.5 |
| 5 | 0.0562 | ~87.0 (estimate) |
| 0 | 0.0652 | 87.0 |
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